Many power applications require a power stage which usually includes two semiconductor switches that are operatively connected to one another. In many prior art power application applications two individual semiconductor packages are used to obtain the power stage. As a result, the space occupied on the board must accommodate at least two semiconductor packages. Furthermore, parasitics due to the extra package elements such as extra lead resistance and inductance result in less than ideal performance.
In a package according to the present invention, two power semiconductor devices are assembled in one package hence saving area on the board and reducing the consequent parasitics.
A power semiconductor package according to the present invention includes one power semiconductor device having a first power electrode and a second power electrode, another power semiconductor device having a first power electrode and a second power electrode, and a first conductive clip having a web portion and a lead extending from an edge of the web portion and terminating at a first connection surface, the web portion including a first surface electrically and mechanically connected to one of the power electrodes of the one power electrode and a second surface opposite the first surface electrically and mechanically connected to one of the power electrodes of the another power semiconductor device.
According to an aspect of the present invention a power semiconductor package may further include a second conductive clip having a web portion electrically and mechanically connected to either first or the second power electrode of the another power semiconductor device, the second conductive clip further including a lead extending from an edge of the web portion thereof and terminating at a second connection surface generally coplanar with the first connection surface.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.